Creating Reliable Memory Interfaces Fast and Easy

Simulating PCIe Gen5 for Embedded System Design

Part of Simulating for High-Speed Digital Insights series

October 27, 2022 | 11:00 AM CET

Successful memory interface design is more than building and simulating one design that works to the given specification. As a designer, your success relies on making a robust implementation that works for different corner cases, process variations, BOM changes, etc. However, simulating all these cases through a schematic-driven workflow may be a daunting task. In this webinar, we will discuss a way to simplify and streamline the workflow for simulating memory interface requirements with PathWave ADS Memory Designer.

Key Learnings:

Understanding the memory interface bus
How to configure memory interface simulations
Using a wizard driven memory simulation workflow

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PRESENTERS

Hee-Soo Lee

Product Owner for DDR and SerDes Simulation

Keysight Technologies