Select one or more webinars of interest, then submit registration form.
We will demonstrate how 3D EM and circuit co-simulation using RFPro can be used iteratively during design coordination to identify and correct design problems such as coupling, frequency shift, mismatch loss, and stability analysis with Winslow probes.
All this can be done without changing the layout and the results of the EM analysis are seamlessly connected to the circuit. There is no need for tedious and error-prone individual electromagnetic field analysis processes.
The development and evaluation of O-RAN-compliant products requires many key technologies such as baseband, RF, antenna, OTA, wideband DPD, HSD, etc., which is a big challenge for vendors who want to enter the market. Keysight provides EDA simulation tools that cover these technologies and consulting services to quickly solve customer-specific issues, thereby accelerating market entry for customers.
High frequency circuit designers often struggle with the stability of their circuits. Learn techniques to identify and solve stability problems at the design stage before they become a headache in the laboratory. Traditional methodologies will be discussed, as well as a unique approach using the PathWave Advanced Design System's (ADS) new bi-directional impedance probe, the Winslow Probe.
This webinar is geared toward RF design engineers working in commercial wireless. It addresses design challenges such as increased EM effects on circuit simulations due to mmWave frequencies and higher frequency bands with larger, modulated broadband data sets.
- RF Circuit and EM co-simulation
- RFPro integration with Ansys HFSS, Synopsis, and Mentor
- Faster simulations with the cloud HPC SimService
This module is geared toward high-speed digital design engineers working in data center or networking applications.
This session addresses how new memory standards require complex, comprehensive simulation as well the challenges that come from higher transfer speeds including tighter margins.
you will learn about:
- Comprehensive workflow for the latest memory standards
- Integrated analysis for DDR memory designs, faster simulations
- Complete analysis with connected simulation and compliance testing