Title: Next Generation Memory Solutions – Are you ready for Single-Ended PAM4?
Time: 10:00 AM PT / 1:00 PM ET
Date: Thursday September 30, 2021
Due to ever increasing data demand, the speed grade for memory systems has been increasing so much in the last decade. The speed grade is now getting into multi-gigabit range where we also see some revolutionary memory systems that employ multi-level modulations, for instance, GDDR6X and GDDR7 with PAM4. This is where the boundary between DDR and SerDes becomes blurry. In this session, we will discuss next generation memory systems and solutions.
- Simulation challenges for next generation memory systems
- Single-ended PAM4 implementation in memory systems
- Easy AMI model generation for Pathfinding
Product Owner for DDR and SerDes Simulation
HeeSoo LEE is the SerDes/DDR product owner in the EEsof EDA group of Keysight Technologies DES division, located Santa Rosa California, USA. He has held several different positions in Keysight Technologies, Agilent Technologies, and Hewlett-Packard including consulting business manager, technical marketing lead, and field applications engineer since 1989. Before, he worked for Daeryung Ind. Inc. as a RF/MW circuit design engineer. He has over 30 years of design and simulation experience in the area of RF, microwave, and high-speed digital designs. He graduated with a BSEE degree from the Hankuk Aviation University, South Korea.