Addressing FEC Challenges on your Next Generation 800G Designs
Test procedures for 400G have changed significantly over the last few years. As data rates increase, serial links no longer run error free. As a result, forward error correction (FEC) is a necessity in the 400G world and beyond and introduces new test challenges. Although it restores error-free data, certain conditions can overwhelm FEC, resulting in lost data. When FEC fails, you need to quickly debug the issues. 

In this webinar you will discover tools for debugging and solving your FEC test challenges.

Join this one-hour webinar to learn more about:

  • PAM4 and FEC test challenges
  • 400G test procedures and moving towards 800G
  • Tools for debugging and solving FEC test challenges
Date: Wednesday, August 04, 2021
Hour: 2:30 PM IST / 11 AM CEST
Duration: 1 hour

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Steve Sekel
Steve Sekel
400G Solutions Specialist
Keysight Technologies
Sanjay Cartic
Sanjay Cartic
Principal FPGA Engineer
Ixia Labs, Keysight Technologies

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